QUARTUSII中bdf自动转化为VHDL的问题，急等

不知道怎么回事一自动转化就会报错
如下：
Error (10500): VHDL syntax error at TOP.vhd(277) near text "741600"; expecting "(", or an identifier, or a sequential statement
Error (10500): VHDL syntax error at TOP.vhd(288) near text ";"; expecting "<="
下面是出错的部分
b2v_inst30 : 74160_0——这句对应第一个
PORT MAP(CLK => SYNTHESIZED_WIRE_10,
ENT => SYNTHESIZED_WIRE_30,

b2v_inst30 : 74160_0
PORT MAP(CLK => SYNTHESIZED_WIRE_10,
ENT => SYNTHESIZED_WIRE_30,
A => SYNTHESIZED_WIRE_31,
B => SYNTHESIZED_WIRE_31,
C => SYNTHESIZED_WIRE_31,
D => SYNTHESIZED_WIRE_31,
LDN => SYNTHESIZED_WIRE_16,
ENP => SYNTHESIZED_WIRE_30,
CLRN => SYNTHESIZED_WIRE_30,
QA => U0,
QB => U1);——这句对应第二个

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元件名返御应当符合VHDL的标伏禅识符规则，用拉丁字母开头。
例如将74160_0改为LS74160_0试试看，当然在结构体开始处的元件声明缺世尘部分也要相应改一下。

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